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XC4VLX40-11FF668I 448 I/O 1.2V Xilinx FPGA Chip

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XC4VLX40-11FF668I 448 I/O 1.2V Xilinx FPGA Chip

Name: XC4VLX4011FF668I 448 IO 12V Xilinx FPGA Chip
Brand: Xilinx Inc.
Price: 1000 USD

Brand Name : Xilinx Inc.

Model Number : XC4VLX40-11FF668I

Certification : Lead free / RoHS Compliant

MOQ : 1 pcs

Price : USD 1000~2000 pcs

Payment Terms : T/T, Western Union, Paypal, Trade Assurance, Credit Card

Supply Ability : 245 pcs

Delivery Time : 3-5 Day

Packaging Details : International Standard Packaging

Category : Programmable Logic ICs

Condition : Original 100%,Brand New and Original,New

Number of I/Os : 448 I/O

Product : Virtex-4

Package / Case : FBGA-668

Distributed RAM : 288 kbit

Embedded Block RAM - EBR : 1728 kbit

Maximum Operating Frequency : 500 MHz

Service : BOM Kitting

Lead time : In Stock,contact us

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XC4VLX40-11FF668I Xilinx FPGA Chip FBGA-668 448 I/O Virtex-4

Product Attribute	Attribute Value
Manufacturer:	Xilinx
Product Category:	FPGA - Field Programmable Gate Array
Product:	Virtex-4
Number of Logic Elements:	41472
Number of I/Os:	448 I/O
Operating Supply Voltage:	1.2 V
Minimum Operating Temperature:	- 40 C
Maximum Operating Temperature:	+ 100 C
Mounting Style:	SMD/SMT
Package / Case:	FBGA-668
Series:	XC4VLX40
Brand:	Xilinx
Distributed RAM:	288 kbit
Embedded Block RAM - EBR:	1728 kbit
Maximum Operating Frequency:	500 MHz
Moisture Sensitive:	Yes
Product Type:	FPGA - Field Programmable Gate Array
Factory Pack Quantity:	1
Subcategory:	Programmable Logic ICs
Tradename:	Virtex

Summary of Virtex-4 FPGA Features

• Flip-Chip Packaging including Pb-Free Package Choices

• Programmable single-ended or differential (LVDS) operation
• Input block with an optional single data rate (SDR) or double data rate (DDR) register
• Output block with an optional SDR or DDR register
• Bidirectional block
• Per-bit deskew circuitry
• Dedicated I/O and regional clocking resources
• Built in data serializer/deserializer

• XtremeDSP™ Slice
- 18 x 18, two’s complement, signed Multiplier
- Optional pipeline stages
- Built-in Accumulator (48-bit) and Adder/Subtracter

• SelectIO™ Technology
- 1.5V to 3.3V I/O operation
- Built-in ChipSync™ source-synchronous technology
- Digitally controlled impedance (DCI) active termination
- Fine grained I/O banking (configuration in one bank)

The IOB registers are either edge-triggered D-type flip-flops or level-sensitive latches.
IOBs support the following single-ended standards:
• LVTTL
• LVCMOS (3.3V, 2.5V, 1.8V, and 1.5V)
• PCI (33 and 66 MHz)
• PCI-X
• GTL and GTLP
• HSTL 1.5V and 1.8V (Class I, II, III, and IV)
• SSTL 1.8V and 2.5V (Class I and II)

XC4VLX40-11FF668I 448 I/O 1.2V Xilinx FPGA Chip

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XC4VLX40-11FF668I 448 I/O 1.2V Xilinx FPGA Chip Images

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XC4VLX40-11FF668I 448 I/O 1.2V Xilinx FPGA Chip

XC4VLX40-11FF668I 448 I/O 1.2V Xilinx FPGA Chip

1.2V Xilinx FPGA Chip

XC4VLX40-11FF668I Virtex 4

448 I/O Virtex 4

XC4VLX40-11FF668I 448 I/O 1.2V Xilinx FPGA Chip Images